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	<title>Template:Infobox CPU series/doc - Revision history</title>
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	<updated>2026-04-04T17:56:21Z</updated>
	<subtitle>Revision history for this page on the wiki</subtitle>
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		<title>84.250.15.152: /* See also */ Remove a link to Template:Infobox CPU series; add a link to Template:Infobox CPU</title>
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		<updated>2024-10-20T22:40:43Z</updated>

		<summary type="html">&lt;p&gt;&lt;span class=&quot;autocomment&quot;&gt;See also: &lt;/span&gt; Remove a link to &lt;a href=&quot;/wiki/index.php/Template:Infobox_CPU_series&quot; title=&quot;Template:Infobox CPU series&quot;&gt;Template:Infobox CPU series&lt;/a&gt;; add a link to &lt;a href=&quot;/wiki/index.php/Template:Infobox_CPU&quot; title=&quot;Template:Infobox CPU&quot;&gt;Template:Infobox CPU&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;{{Documentation subpage}}&lt;br /&gt;
{{Generic template demo |name |image |caption |alt |launching |launched |discontinued |designedby |manuf1 |process1 |codename1 |platform1 |branding |generation |socket1 |instructions-set |instructions |extensions1 |core-arch |p-core-arch |e-core-arch&lt;br /&gt;
|core-codename1 |ccd-codename |core-count |peak-clock |peakclock-unit |l1-cache |l2-cache |l3-cache |p-l0-cache |p-l1-cache |e-l1-cache |p-l2-cache |e-l2-cache |p-l3-cache |e-l3-cache |graphics-arch |gpu-model1 |cu-count |xe-count |eu-count |graphics-clock |graphics-clockunit |npu-arch |npu-tops |npu-clock |npu-clockunit |memory-type |memory-channels |amountmemory |pcie-support |pcie-lanes |cxl-support |upi-links |dmi-version |ht-version |ht-speeds |predecessor |variant |successor&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
== Usage ==&lt;br /&gt;
&amp;lt;syntaxhighlight lang=&amp;quot;wikitext&amp;quot; style=&amp;quot;overflow:auto;&amp;quot;&amp;gt;&lt;br /&gt;
{{Infobox CPU series&lt;br /&gt;
| name               = &amp;lt;!-- Name of CPU series, following the name of the article --&amp;gt;&lt;br /&gt;
| image              = &amp;lt;!-- An image to show in the infobox --&amp;gt;&lt;br /&gt;
| caption            = &amp;lt;!-- A caption for the image --&amp;gt;&lt;br /&gt;
| alt                = &amp;lt;!-- Mouse over text for the image --&amp;gt;&lt;br /&gt;
| launching          = &amp;lt;!-- Use if a CPU series has not yet launched but its official release date is known --&amp;gt;&lt;br /&gt;
| launched           = &amp;lt;!-- Use for the official release date for a CPU series after it has been released, not announced --&amp;gt;&lt;br /&gt;
| discontinued       = &amp;lt;!-- Date for when the CPU series was discontinued --&amp;gt;&lt;br /&gt;
| designedby         = &amp;lt;!-- Name of company who designed the CPU series, e.g. Intel, AMD --&amp;gt;&lt;br /&gt;
| manuf1             = &amp;lt;!-- (1..9) Name of company who manufactures the CPU series, e.g. TSMC, Samsung, GlobalFoundries --&amp;gt;&lt;br /&gt;
| process1           = &amp;lt;!-- (1..9) Semiconductor fabrication process, e.g. TSMC N7, Intel 14nm --&amp;gt;&lt;br /&gt;
| codename1          = &amp;lt;!-- (1..5) Official codename for the CPU series, e.g. Raphael, Vermeer, ADL, MTL --&amp;gt;&lt;br /&gt;
| platform1          = &amp;lt;!-- (1..5) Platform type, e.g. desktop, mobile, server --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Branding  -------------------&amp;gt;&lt;br /&gt;
| branding           = &amp;lt;!-- Brand names used by processor series, e.g. Core, Xeon, Ryzen --&amp;gt;&lt;br /&gt;
| generation         = &amp;lt;!-- Generation number, e.g. 5th Generation, 10th Generation, Series 1 --&amp;gt;&lt;br /&gt;
| socket1            = &amp;lt;!-- (1..9) CPU socket(s) used by the CPU series, e.g. LGA 1700, AM4, AM5, LGA 4677 --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------ Instructions &amp;amp; Architecture -------------------&amp;gt;&lt;br /&gt;
| instructions-set   = &amp;lt;!-- e.g. x86, ARM --&amp;gt;&lt;br /&gt;
| instructions       = &amp;lt;!-- e.g. x86-64, AMD64, ARM64 --&amp;gt;&lt;br /&gt;
| extensions1        = &amp;lt;!-- (1..5) e.g. SSE, AVX2, AVX-512 --&amp;gt;&lt;br /&gt;
| core-arch          = &amp;lt;!-- Codename for the architecture used by the CPU series, e.g. Zen 3, Zen 4, Skylake, Sunny Cove --&amp;gt;&lt;br /&gt;
| p-core-arch        = &amp;lt;!-- Codename for the P-cores used by the CPU series, e.g. Golden Cove, Raptor Cove, Redwood Cove --&amp;gt;&lt;br /&gt;
| e-core-arch        = &amp;lt;!-- Codename for the E-cores used by the CPU series, e.g. Gracemont, Crestmont, Skymont --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Cores  -------------------&amp;gt;&lt;br /&gt;
| core-codename1     = &amp;lt;!-- (1..9) Codename(s) for the CPU cores --&amp;gt;&lt;br /&gt;
| ccd-codename       = &amp;lt;!-- Codename(s) for the Core Complex Die (CCD) on applicable AMD Ryzen and Epyc CPU series --&amp;gt;&lt;br /&gt;
| core-count         = &amp;lt;!-- Number of cores (e.g. Up to 16 cores) --&amp;gt;&lt;br /&gt;
| peak-clock         = &amp;lt;!-- Peak clock rate number, e.g. Up to 5.6 --&amp;gt;&lt;br /&gt;
| peakclock-unit     = &amp;lt;!-- Peak clock rate unit, e.g. MHz or GHz --&amp;gt;&lt;br /&gt;
| l1-cache           = &amp;lt;!-- Amount of L1 cache (per core) --&amp;gt;&lt;br /&gt;
| l2-cache           = &amp;lt;!-- Amount of L2 cache (per core) --&amp;gt;&lt;br /&gt;
| l3-cache           = &amp;lt;!-- Amount of L3 cache --&amp;gt;&lt;br /&gt;
| p-l0-cache         = &amp;lt;!-- For Intel P-cores, amount of L0 cache (per P-core) --&amp;gt;&lt;br /&gt;
| p-l1-cache         = &amp;lt;!-- For Intel P-cores, amount of L1 cache (per P-core) --&amp;gt;&lt;br /&gt;
| e-l1-cache         = &amp;lt;!-- For Intel E-cores, amount of L1 cache (per E-core) --&amp;gt;&lt;br /&gt;
| p-l2-cache         = &amp;lt;!-- For Intel P-cores, amount of L2 cache (per P-core) --&amp;gt;&lt;br /&gt;
| e-l2-cache         = &amp;lt;!-- For Intel E-cores, amount of L2 cache (per E-core cluster) --&amp;gt;&lt;br /&gt;
| p-l3-cache         = &amp;lt;!-- For Intel P-cores, amount of L3 cache (per P-core) --&amp;gt;&lt;br /&gt;
| e-l3-cache         = &amp;lt;!-- For Intel E-cores, amount of L3 cache (per E-core cluster) --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Graphics -------------------&amp;gt;&lt;br /&gt;
| graphics-arch      = &amp;lt;!-- Graphics architecture used by the CPU&amp;#039;s integrated graphics --&amp;gt;&lt;br /&gt;
| gpu-model1         = &amp;lt;!-- (1..9) Name of GPU models featured, e.g. UHD 770, UHD 630, 780M --&amp;gt;&lt;br /&gt;
| cu-count           = &amp;lt;!-- Number of Compute Units (CUs) for AMD graphics, e.g. Up to 12 CUs --&amp;gt;&lt;br /&gt;
| xe-count           = &amp;lt;!-- Number of Xe cores for Intel Arc graphics, e.g. Up to 8 X&amp;lt;sup&amp;gt;e&amp;lt;/sup&amp;gt;-LPG cores --&amp;gt;&lt;br /&gt;
| eu-count           = &amp;lt;!-- Number of Execution Units (EUs) for Intel graphics, e.g. Up to 24 EUs --&amp;gt;&lt;br /&gt;
| graphics-clock     = &amp;lt;!-- Peak graphics clock for the integrated GPU, e.g. Up to 2100 MHz --&amp;gt;&lt;br /&gt;
| graphics-clockunit =&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  NPU -------------------&amp;gt;&lt;br /&gt;
| npu-arch           = &amp;lt;!-- e.g. XDNA, XDNA 2, NPU 3720 --&amp;gt;&lt;br /&gt;
| npu-tops           = &amp;lt;!-- Number of TOPs performance for the NPU only, not the combined TOPs for the CPU, GPU and NPU --&amp;gt;&lt;br /&gt;
| npu-clock          = &lt;br /&gt;
| npu-clockunit      = &lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Memory Suppport -------------------&amp;gt;&lt;br /&gt;
| memory-type        = &amp;lt;!-- Supported memory types, e.g. DDR3, DDR4, DDR5 --&amp;gt;&lt;br /&gt;
| memory-channels    = &amp;lt;!-- Number of memory channels, e.g. 2 channels, 4 channels, 8 channels --&amp;gt;&lt;br /&gt;
| amountmemory       = &amp;lt;!-- Maximum amount of memory supported, e.g. Up to 256{{nbsp}}GB, Up to 2{{nbsp}}TB --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  I/O -------------------&amp;gt;&lt;br /&gt;
| pcie-support       = &amp;lt;!-- e.g. PCIe 3.0, PCIe 4.0, PCIe 5.0 --&amp;gt;&lt;br /&gt;
| pcie-lanes         = &amp;lt;!-- Lanes provided by the CPU, not the PCH, e.g. 128 PCIe 5.0 lanes --&amp;gt;&lt;br /&gt;
| cxl-support        = &amp;lt;!-- e.g. CXL 1.1, CXL 2.0 --&amp;gt;&lt;br /&gt;
| upi-links          = &lt;br /&gt;
| dmi-version        = &amp;lt;!-- Direct Media Inferface (DMI) version for Intel CPUs --&amp;gt;&lt;br /&gt;
| ht-version         = &amp;lt;!-- HyperTransport version --&amp;gt;&lt;br /&gt;
| ht-speeds          = &lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  History  -------------------&amp;gt;&lt;br /&gt;
| predecessor        = &amp;lt;!-- What CPU series came before --&amp;gt;&lt;br /&gt;
| variant            = &amp;lt;!-- Similar or related CPU series that is classified as part of the same generation or uses the same architecture --&amp;gt;&lt;br /&gt;
| successor          = &amp;lt;!-- What CPU series came after --&amp;gt;&lt;br /&gt;
}}&lt;br /&gt;
&amp;lt;/syntaxhighlight&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&amp;lt;includeonly&amp;gt;{{Sandbox other||&lt;br /&gt;
&amp;lt;!----PLEASE ADD CATEGORIES BELOW THIS LINE----&amp;gt;&lt;br /&gt;
[[Category:Computer hardware infobox templates]]&lt;br /&gt;
}}&amp;lt;/includeonly&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Examples ==&lt;br /&gt;
=== Ryzen 7000 Series ===&lt;br /&gt;
{{Infobox CPU series&lt;br /&gt;
| name             = Ryzen 7000 Series&lt;br /&gt;
| image            = AMD Ryzen 9 7900X.jpg&lt;br /&gt;
| caption          = AMD Ryzen 9 7900X processor&lt;br /&gt;
| alt              = &lt;br /&gt;
| launching        = &lt;br /&gt;
| launched         = {{start date|2022|09|27}}&lt;br /&gt;
| discontinued     = &lt;br /&gt;
| designedby       = [[Advanced Micro Devices|AMD]]&lt;br /&gt;
| manuf1           = [[TSMC]]&lt;br /&gt;
| process1         = [[TSMC]] [[5 nm process|N5]]&lt;br /&gt;
| process2         = [[TSMC]] [[7 nm process|N6]]&lt;br /&gt;
| codename1        = Raphael&lt;br /&gt;
| codename2        = Raphael-X&lt;br /&gt;
| platform1        = Desktop&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Branding  -------------------&amp;gt;&lt;br /&gt;
| branding         = [[Ryzen]]&lt;br /&gt;
| generation       = &amp;lt;!-- Generation number, e.g. 5th Generation, 10th Generation --&amp;gt;&lt;br /&gt;
| socket1          = [[Socket AM5]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Architecture and Instructions  -------------------&amp;gt;&lt;br /&gt;
| cpu-architecture = [[Zen 4]]&lt;br /&gt;
| instructions-set = [[x86]]&lt;br /&gt;
| instructions     = {{hlist|[[x86-64]]|[[x86-64|AMD64]]}}&lt;br /&gt;
| extensions       = &amp;lt;!-- e.g. SSE, AVX2, AVX-512 --&amp;gt;&lt;br /&gt;
| core-arch        = [[Zen 4]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Specifications  -------------------&amp;gt;&lt;br /&gt;
| core-codename    = Persephone&lt;br /&gt;
| ccd-codename     = Durango&lt;br /&gt;
| core-count       = Up to 16 cores&lt;br /&gt;
| peak-clock       = Up to 5.7&lt;br /&gt;
| peakclock-unit   = GHz&lt;br /&gt;
| l1-cache         = 64{{nbsp}}KB (per core): &amp;lt;br /&amp;gt; {{bulleted list|32{{nbsp}}KB instructions|32{{nbsp}}KB data}}&lt;br /&gt;
| l2-cache         = 1{{nbsp}}MB (per core)&lt;br /&gt;
| l3-cache         = 32{{nbsp}}MB (per {{abbr|CCD|Core Complex Die}})&lt;br /&gt;
| memory-support   = [[DDR5 SDRAM|DDR5]]&lt;br /&gt;
| memory-channels  = 2 channels&lt;br /&gt;
| pcie-support     = [[PCI Express#PCI Express 5.0|PCIe 5.0]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Integrated Graphics -------------------&amp;gt;&lt;br /&gt;
| graphics-arch    = [[RDNA 2]]&lt;br /&gt;
| gpu-model1       = Radeon Graphics&lt;br /&gt;
| cu-count         = 2&lt;br /&gt;
| graphics-clock   = Up to 2100 MHz&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  History  -------------------&amp;gt;&lt;br /&gt;
| predecessor      = Ryzen 6000 series&lt;br /&gt;
| successor        = Ryzen 8000 series&lt;br /&gt;
}}&lt;br /&gt;
&amp;lt;syntaxhighlight lang=&amp;quot;wikitext&amp;quot;&amp;gt;&lt;br /&gt;
{{Infobox CPU series&lt;br /&gt;
| name             = Ryzen 7000 Series&lt;br /&gt;
| image            = AMD Ryzen 9 7900X.jpg&lt;br /&gt;
| caption          = AMD Ryzen 9 7900X processor&lt;br /&gt;
| alt              = &lt;br /&gt;
| launching        = &lt;br /&gt;
| launched         = {{start date|2022|09|27}}&lt;br /&gt;
| discontinued     = &lt;br /&gt;
| designedby       = [[Advanced Micro Devices|AMD]]&lt;br /&gt;
| manuf1           = [[TSMC]]&lt;br /&gt;
| process1         = [[TSMC]] [[5 nm process|N5]]&lt;br /&gt;
| process2         = [[TSMC]] [[7 nm process|N6]]&lt;br /&gt;
| codename1        = Raphael&lt;br /&gt;
| codename2        = Raphael-X&lt;br /&gt;
| platform1        = Desktop&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Branding  -------------------&amp;gt;&lt;br /&gt;
| branding         = [[Ryzen]]&lt;br /&gt;
| generation       = &amp;lt;!-- Generation number, e.g. 5th Generation, 10th Generation --&amp;gt;&lt;br /&gt;
| socket1          = [[Socket AM5]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Architecture and Instructions  -------------------&amp;gt;&lt;br /&gt;
| instructions-set = [[x86]]&lt;br /&gt;
| instructions     = {{hlist|[[x86-64]]|[[x86-64|AMD64]]}}&lt;br /&gt;
| extensions       = &amp;lt;!-- e.g. SSE, AVX2, AVX-512 --&amp;gt;&lt;br /&gt;
| core-arch        = [[Zen 4]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Specifications  -------------------&amp;gt;&lt;br /&gt;
| core-codename    = Persephone&lt;br /&gt;
| ccd-codename     = Durango&lt;br /&gt;
| core-count       = Up to 16 cores&lt;br /&gt;
| peak-clock       = Up to 5.7&lt;br /&gt;
| peakclock-unit   = GHz&lt;br /&gt;
| l1-cache         = 64{{nbsp}}KB (per core): &amp;lt;br /&amp;gt; {{bulleted list|32{{nbsp}}KB instructions|32{{nbsp}}KB data}}&lt;br /&gt;
| l2-cache         = 1{{nbsp}}MB (per core)&lt;br /&gt;
| l3-cache         = 32{{nbsp}}MB (per {{abbr|CCD|Core Complex Die}})&lt;br /&gt;
| memory-support   = [[DDR5 SDRAM|DDR5]]&lt;br /&gt;
| memory-channels  = 2 channels&lt;br /&gt;
| pcie-support     = [[PCI Express#PCI Express 5.0|PCIe 5.0]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Integrated Graphics -------------------&amp;gt;&lt;br /&gt;
| graphics-arch    = [[RDNA 2]]&lt;br /&gt;
| gpu-model1       = Radeon Graphics&lt;br /&gt;
| cu-count         = 2&lt;br /&gt;
| graphics-clock   = Up to 2100 MHz&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  History  -------------------&amp;gt;&lt;br /&gt;
| predecessor      = Ryzen 6000 series&lt;br /&gt;
| successor        = Ryzen 8000 series&lt;br /&gt;
}}&lt;br /&gt;
&amp;lt;/syntaxhighlight&amp;gt;&lt;br /&gt;
 &lt;br /&gt;
=== Alder Lake ===&lt;br /&gt;
{{Infobox CPU series&lt;br /&gt;
| name             = Alder Lake&lt;br /&gt;
| image            = 2023 Intel Core i7 12700KF (5).jpg&lt;br /&gt;
| caption          = Intel Core i7-12700KF&lt;br /&gt;
| alt              = &lt;br /&gt;
| launched         = {{start date|2021|11|04}}&lt;br /&gt;
| designedby       = [[Intel]]&lt;br /&gt;
| manuf1           = [[Intel]]&lt;br /&gt;
| process1         = [[10 nm process|Intel 7]]&lt;br /&gt;
| codename         = ADL&lt;br /&gt;
| platform1        = Desktop&lt;br /&gt;
| platform2        = Mobile&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Branding  -------------------&amp;gt;&lt;br /&gt;
| branding         = {{ubl |[[Intel Core|Core]] |[[Pentium]] |[[Celeron]] |Intel Processor}}&lt;br /&gt;
| generation       = 12th Generation&lt;br /&gt;
| socket1          = [[LGA 1700]]&lt;br /&gt;
| socket2          = BGA{{nbsp}}1774&lt;br /&gt;
| socket3          = BGA{{nbsp}}1964&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------ Instructions &amp;amp; Architecture -------------------&amp;gt;&lt;br /&gt;
| instructions-set = [[x86]]&lt;br /&gt;
| instructions     = [[x86-64]]&lt;br /&gt;
| extensions       = [[AES instruction set|AES-NI]], [[CLMUL instruction set|CLMUL]], [[RDRAND]], [[Intel SHA extensions|SHA]], [[Trusted Execution Technology|TXT]], [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]], [[SSE4.1]], [[SSE4.2]], [[Advanced Vector Extensions|AVX]], [[Advanced Vector Extensions#Advanced Vector Extensions 2|AVX2]], [[FMA3]], [[Advanced Vector Extensions#AVX-VNNI|AVX-VNNI]], [[VT-x]], [[VT-d]]&lt;br /&gt;
| p-core-arch      = [[Golden Cove]] &lt;br /&gt;
| e-core-arch      = [[Gracemont]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Specifications  -------------------&amp;gt;&lt;br /&gt;
| core-count       = 16 cores: &amp;lt;br/&amp;gt; {{bulleted list|Up to 8 P-cores|Up to 8 E-cores}}&lt;br /&gt;
| peak-clock       = Up to 5.5&lt;br /&gt;
| peakclock-unit   = GHz&lt;br /&gt;
| p-l1-cache       = 80{{nbsp}}KB (per core): &amp;lt;br /&amp;gt; {{bulleted list|32{{nbsp}}KB instructions|48{{nbsp}}KB data}}&lt;br /&gt;
| e-l1-cache       = 96{{nbsp}}KB (per core): &amp;lt;br /&amp;gt; {{bulleted list|64{{nbsp}}KB instructions|32{{nbsp}}KB data}}&lt;br /&gt;
| p-l2-cache       = 2{{nbsp}}MB (per core)&lt;br /&gt;
| e-l2-cache       = 2{{nbsp}}MB (per cluster)&lt;br /&gt;
| p-l3-cache       = 3{{nbsp}}MB (per core)&lt;br /&gt;
| e-l3-cache       = 3{{nbsp}}MB (per cluster)&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Memory Support -------------------&amp;gt;&lt;br /&gt;
| memory-type      = [[DDR4 SDRAM|DDR4]]-3200 &amp;lt;br/&amp;gt; [[DDR5 SDRAM|DDR5]]-4800&lt;br /&gt;
| memory-channels  = 2 channels&lt;br /&gt;
| amountmemory     = 256{{nbsp}}GB&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  I/O -------------------&amp;gt;&lt;br /&gt;
| pcie-support     = [[PCI Express#PCI Express 5.0|PCIe 5.0]]&lt;br /&gt;
| pcie-lanes       = 16 [[PCI Express#PCI Express 5.0|PCIe 5.0]] lanes &amp;lt;br/&amp;gt; 4 [[PCI Express#PCI Express 4.0|PCIe 4.0]] lanes&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Integrated Graphics -------------------&amp;gt;&lt;br /&gt;
| graphics-arch    = [[Intel Xe|Iris X&amp;lt;sup&amp;gt;e&amp;lt;/sup&amp;gt;]]&lt;br /&gt;
| gpu-model1       = UHD 730&lt;br /&gt;
| gpu-model2       = UHD 770&lt;br /&gt;
| eu-count         = 96&lt;br /&gt;
| graphics-clock   = Up to 1550 MHz&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  History  -------------------&amp;gt;&lt;br /&gt;
| predecessor      = [[Rocket Lake]]&lt;br /&gt;
| successor        = [[Raptor Lake]]&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&amp;lt;syntaxhighlight lang=&amp;quot;wikitext&amp;quot;&amp;gt;&lt;br /&gt;
{{Infobox CPU series&lt;br /&gt;
| name             = Alder Lake&lt;br /&gt;
| image            = 2023 Intel Core i7 12700KF (5).jpg&lt;br /&gt;
| caption          = Intel Core i7-12700KF&lt;br /&gt;
| alt              = &lt;br /&gt;
| launched         = {{start date|2021|11|04}}&lt;br /&gt;
| designedby       = [[Intel]]&lt;br /&gt;
| manuf1           = [[Intel]]&lt;br /&gt;
| process1         = [[10 nm process|Intel 7]]&lt;br /&gt;
| codename         = ADL&lt;br /&gt;
| platform1        = Desktop&lt;br /&gt;
| platform2        = Mobile&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Branding  -------------------&amp;gt;&lt;br /&gt;
| branding         = {{ubl |[[Intel Core|Core]] |[[Pentium]] |[[Celeron]] |Intel Processor}}&lt;br /&gt;
| generation       = 12th Generation&lt;br /&gt;
| socket1          = [[LGA 1700]]&lt;br /&gt;
| socket2          = BGA{{nbsp}}1774&lt;br /&gt;
| socket3          = BGA{{nbsp}}1964&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------ Instructions &amp;amp; Architecture -------------------&amp;gt;&lt;br /&gt;
| instructions-set = [[x86]]&lt;br /&gt;
| instructions     = [[x86-64]]&lt;br /&gt;
| extensions       = [[AES instruction set|AES-NI]], [[CLMUL instruction set|CLMUL]], [[RDRAND]], [[Intel SHA extensions|SHA]], [[Trusted Execution Technology|TXT]], [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]], [[SSE4.1]], [[SSE4.2]], [[Advanced Vector Extensions|AVX]], [[Advanced Vector Extensions#Advanced Vector Extensions 2|AVX2]], [[FMA3]], [[Advanced Vector Extensions#AVX-VNNI|AVX-VNNI]], [[VT-x]], [[VT-d]]&lt;br /&gt;
| p-core-arch      = [[Golden Cove]] &lt;br /&gt;
| e-core-arch      = [[Gracemont]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Specifications  -------------------&amp;gt;&lt;br /&gt;
| core-count       = 16 cores:  &amp;lt;br /&amp;gt; {{bulleted list|Up to 8 P-cores|Up to 8 E-cores}}&lt;br /&gt;
| peak-clock       = Up to 5.5&lt;br /&gt;
| peakclock-unit   = GHz&lt;br /&gt;
| p-l1-cache       = 80{{nbsp}}KB (per core): &amp;lt;br /&amp;gt; {{bulleted list|32{{nbsp}}KB instructions|48{{nbsp}}KB data}}&lt;br /&gt;
| e-l1-cache       = 96{{nbsp}}KB (per core): &amp;lt;br /&amp;gt; {{bulleted list|64{{nbsp}}KB instructions|32{{nbsp}}KB data}}&lt;br /&gt;
| p-l2-cache       = 2{{nbsp}}MB (per core)&lt;br /&gt;
| e-l2-cache       = 2{{nbsp}}MB (per cluster)&lt;br /&gt;
| p-l3-cache       = 3{{nbsp}}MB (per core)&lt;br /&gt;
| e-l3-cache       = 3{{nbsp}}MB (per cluster)&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Memory Support -------------------&amp;gt;&lt;br /&gt;
| memory-type      = [[DDR4 SDRAM|DDR4]]-3200 &amp;lt;br/&amp;gt; [[DDR5 SDRAM|DDR5]]-4800&lt;br /&gt;
| memory-channels  = 2 channels&lt;br /&gt;
| amountmemory     = 256{{nbsp}}GB&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  I/O -------------------&amp;gt;&lt;br /&gt;
| pcie-support     = [[PCI Express#PCI Express 5.0|PCIe 5.0]]&lt;br /&gt;
| pcie-lanes       = 16 [[PCI Express#PCI Express 5.0|PCIe 5.0]] lanes &amp;lt;br/&amp;gt; 4 [[PCI Express#PCI Express 4.0|PCIe 4.0]] lanes&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Integrated Graphics -------------------&amp;gt;&lt;br /&gt;
| graphics-arch    = [[Intel Xe|Iris X&amp;lt;sup&amp;gt;e&amp;lt;/sup&amp;gt;]]&lt;br /&gt;
| gpu-model1       = UHD 730&lt;br /&gt;
| gpu-model2       = UHD 770&lt;br /&gt;
| eu-count         = 96&lt;br /&gt;
| graphics-clock   = Up to 1550 MHz&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  History  -------------------&amp;gt;&lt;br /&gt;
| predecessor      = [[Rocket Lake]]&lt;br /&gt;
| successor        = [[Raptor Lake]]&lt;br /&gt;
}}&lt;br /&gt;
&amp;lt;/syntaxhighlight&amp;gt;&lt;br /&gt;
&lt;br /&gt;
=== EPYC 9004 Series ===&lt;br /&gt;
{{Infobox CPU series&lt;br /&gt;
| name             = EPYC 9004 Series&lt;br /&gt;
| image            = &lt;br /&gt;
| caption          = &lt;br /&gt;
| alt              = &lt;br /&gt;
| launched         = {{start date|2022|11|10}}&lt;br /&gt;
| discontinued     = &lt;br /&gt;
| designedby       = [[Advanced Micro Devices|AMD]]&lt;br /&gt;
| manuf1           = [[TSMC]]&lt;br /&gt;
| process1         = [[TSMC]] [[5 nm process|N5]]&lt;br /&gt;
| process2         = [[TSMC]] [[7 nm process|N6]]&lt;br /&gt;
| codename1        = Genoa&lt;br /&gt;
| codename2        = Genoa-X&lt;br /&gt;
| codename3        = Bergamo&lt;br /&gt;
| platform1        = Server&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Branding  -------------------&amp;gt;&lt;br /&gt;
| branding         = [[EPYC]]&lt;br /&gt;
| generation       = 4th Generation&lt;br /&gt;
| socket1          = [[Socket SP5]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Instructions &amp;amp; Architecture -------------------&amp;gt;&lt;br /&gt;
| instructions-set = [[x86]]&lt;br /&gt;
| instructions     = {{hlist|[[x86-64]]|[[x86-64|AMD64]]}}&lt;br /&gt;
| extensions       = &amp;lt;!-- e.g. SSE, AVX2, AVX-512 --&amp;gt;&lt;br /&gt;
| core-arch        = [[Zen 4]] &amp;lt;br/&amp;gt; [[Zen 4#Zen 4c|Zen 4c]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Specifications  -------------------&amp;gt;&lt;br /&gt;
| core-codename1   = Persephone&lt;br /&gt;
| ccd-codename     = Durango&lt;br /&gt;
| core-count       = Up to: &amp;lt;br/&amp;gt; {{bulleted list|96 Zen 4 cores|128 Zen 4c cores}}&lt;br /&gt;
| peak-clock       = &lt;br /&gt;
| peakclock-unit   = GHz&lt;br /&gt;
| l1-cache         = 64{{nbsp}}KB (per core): &amp;lt;br /&amp;gt; {{bulleted list|32{{nbsp}}KB instructions|32{{nbsp}}KB data}}&lt;br /&gt;
| l2-cache         = 1{{nbsp}}MB (per core)&lt;br /&gt;
| l3-cache         = 32{{nbsp}}MB (per {{abbr|CCD|Core Complex Die}})&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Memory Support -------------------&amp;gt;&lt;br /&gt;
| memory-type      = [[DDR5 SDRAM|DDR5]]-4800&lt;br /&gt;
| memory-channels  = 12 channels&lt;br /&gt;
| amountmemory     = Up to 6{{nbsp}}TB (per socket)&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  I/O -------------------&amp;gt;&lt;br /&gt;
| pcie-support     = [[PCI Express#PCI Express 5.0|PCIe 5.0]]&lt;br /&gt;
| pcie-lanes       = 128 [[PCI Express#PCI Express 5.0|PCIe 5.0]] lanes &amp;lt;br/&amp;gt; 12 [[PCI Express#PCI Express 3.0|PCIe 3.0]] lanes&lt;br /&gt;
| cxl-support      = [[Compute Express Link|CXL 1.1+]] Type 3&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  History  -------------------&amp;gt;&lt;br /&gt;
| predecessor      = EPYC 7003 &amp;lt;br/&amp;gt; (&amp;quot;Milan&amp;quot;)&lt;br /&gt;
| variant          = EPYC 8004 &amp;lt;br/&amp;gt; (&amp;quot;Siena&amp;quot;)&lt;br /&gt;
| successor        = EPYC 9005 &amp;lt;br/&amp;gt; (&amp;quot;Turin&amp;quot;)&lt;br /&gt;
}}&lt;br /&gt;
&amp;lt;syntaxhighlight lang=&amp;quot;wikitext&amp;quot;&amp;gt;&lt;br /&gt;
{{Infobox CPU series&lt;br /&gt;
| name             = EPYC 9004 Series&lt;br /&gt;
| image            = &lt;br /&gt;
| caption          = &lt;br /&gt;
| alt              = &lt;br /&gt;
| launched         = {{start date|2022|11|10}}&lt;br /&gt;
| discontinued     = &lt;br /&gt;
| designedby       = [[Advanced Micro Devices|AMD]]&lt;br /&gt;
| manuf1           = [[TSMC]]&lt;br /&gt;
| process1         = [[TSMC]] [[5 nm process|N5]]&lt;br /&gt;
| process2         = [[TSMC]] [[7 nm process|N6]]&lt;br /&gt;
| codename1        = Genoa&lt;br /&gt;
| codename2        = Genoa-X&lt;br /&gt;
| codename3        = Bergamo&lt;br /&gt;
| platform1        = Server&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Branding  -------------------&amp;gt;&lt;br /&gt;
| branding         = [[EPYC]]&lt;br /&gt;
| generation       = 4th Generation&lt;br /&gt;
| socket1          = [[Socket SP5]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Instructions &amp;amp; Architecture -------------------&amp;gt;&lt;br /&gt;
| instructions-set = [[x86]]&lt;br /&gt;
| instructions     = {{hlist|[[x86-64]]|[[x86-64|AMD64]]}}&lt;br /&gt;
| extensions       = &amp;lt;!-- e.g. SSE, AVX2, AVX-512 --&amp;gt;&lt;br /&gt;
| core-arch        = [[Zen 4]] &amp;lt;br/&amp;gt; [[Zen 4#Zen 4c|Zen 4c]]&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Specifications  -------------------&amp;gt;&lt;br /&gt;
| core-codename1   = Persephone&lt;br /&gt;
| ccd-codename     = Durango&lt;br /&gt;
| core-count       = : &amp;lt;br/&amp;gt; {{bulleted list|96 Zen 4 cores|128 Zen 4c cores}}&lt;br /&gt;
| peak-clock       = &lt;br /&gt;
| peakclock-unit   = GHz&lt;br /&gt;
| l1-cache         = 64{{nbsp}}KB (per core): &amp;lt;br /&amp;gt; {{bulleted list|32{{nbsp}}KB instructions|32{{nbsp}}KB data}}&lt;br /&gt;
| l2-cache         = 1{{nbsp}}MB (per core)&lt;br /&gt;
| l3-cache         = 32{{nbsp}}MB (per {{abbr|CCD|Core Complex Die}})&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  Memory Support -------------------&amp;gt;&lt;br /&gt;
| memory-type      = [[DDR5 SDRAM|DDR5]]-4800&lt;br /&gt;
| memory-channels  = 12 channels&lt;br /&gt;
| amountmemory     = Up to 6{{nbsp}}TB (per socket)&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  I/O -------------------&amp;gt;&lt;br /&gt;
| pcie-support     = [[PCI Express#PCI Express 5.0|PCIe 5.0]]&lt;br /&gt;
| pcie-lanes       = 128 [[PCI Express#PCI Express 5.0|PCIe 5.0]] lanes &amp;lt;br/&amp;gt; 12 [[PCI Express#PCI Express 3.0|PCIe 3.0]] lanes&lt;br /&gt;
| cxl-support      = [[Compute Express Link|CXL 1.1+]] Type 3&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!------------------  History  -------------------&amp;gt;&lt;br /&gt;
| predecessor      = EPYC 7003 &amp;lt;br/&amp;gt; (&amp;quot;Milan&amp;quot;)&lt;br /&gt;
| variant          = EPYC 8004 &amp;lt;br/&amp;gt; (&amp;quot;Siena&amp;quot;)&lt;br /&gt;
| successor        = EPYC 9005 &amp;lt;br/&amp;gt; (&amp;quot;Turin&amp;quot;)&lt;br /&gt;
}}&lt;br /&gt;
&amp;lt;/syntaxhighlight&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== See also ==&lt;br /&gt;
* {{tl|Infobox CPU}}&lt;br /&gt;
* {{tl|Infobox CPU architecture}}&lt;br /&gt;
* {{tl|Infobox computer hardware}}&lt;br /&gt;
&lt;br /&gt;
&amp;lt;includeonly&amp;gt;{{Sandbox other||&lt;br /&gt;
&amp;lt;!-- Categories below this line --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
}}&amp;lt;/includeonly&amp;gt;&lt;/div&gt;</summary>
		<author><name>84.250.15.152</name></author>
	</entry>
</feed>